| 摘要 |
PURPOSE:To detect earlier a fault of an element by providing a circuit where a timer is started at the same time when an processor element is started and the timer overflows when no signal of operation end is transmitted from all processor elements in a system having the plural sets of processor elements and a control processor controlling them. CONSTITUTION:When an instruction starting the plural processor elements 2 is set to an instruction register 105 of the control processor 1, the instruction is read to a corresponding microinstruction register 108 from a control memory 107. Then the program of the element 2 is started and the timer 109 is started by applying the instruction to a microprogram sequencer 206 of all the processor elements 2 via a driver 111 and a communication line 4. When all the programs are finished, the operation end instruction is read from a control memory 207 to a microinstruction register 208 in the element 2, its output sets a flip-flop 210 to zero the output from a driver 211 to a communication line 3. When the level of the line 3 is zero, the timer 109 is reset and the operation is stopped, and when the level is not zero, the system overflows and enters interruption processing. |
