| 摘要 |
PURPOSE:To make communication between processors efficient by determining priority between the microprocessors in accordance with frequency of an access to a common memory. CONSTITUTION:Microprocessors 1-3 execute a common memory access request to access gate circuits 7-9 corresponding in accordance with necessities of communication between processors. An access control circuit 13 confirms presence and absence of an access request to a common memory, in order, for the access gate circuits 7-9, and only when an access is requested, a fixed number is added to a leaky bucket system counter 12. The access control circuit 13 closes the access gate circuits corresponding to a microprocessor with low priority by the count value of the leaky bucket system counter 12 at that time, and frequency of a memory access for a common memory 11 is dropped. Thus, the access to the common memory 11 of permitted microprocessors can be made easy. |
