| 摘要 |
PURPOSE:To attain flexible sorting against the change in data length by connecting plural arithmetic units processing data of m bits and changing the number of connected arithmetic units in response to the change in the data length. CONSTITUTION:An MBSM 10 is a bit slice merger for arithmetic operation of the most significant m bits and a BSM11 is a bit slice merger for arithmetic operation of each m-bit under the MSB. Then each BSM11 is provided with a control circuit 61 and a control signal 60 is applied or disconnected to input an RO42 and an LO43 as it is from the high order to an RI50 and LI51 or input logical 1 at all times. When the control signal 60 is set, the BSM11 acts like the MBSM10 equivalently. Thus, the arithmetic unit sorting one long data by turning off all the control signals 60 and plural arithmetic units sorting short data by turning off the control signal are built. |
