发明名称 MULTI-PROCESSING TYPE COUNTER
摘要 PURPOSE:To attain measurement of long time with a counter of less number of bits and to improve the accuracy at measurement for a short time by switching an adding value fed to an adder depending on the count. CONSTITUTION:When a signal is inputted to an input terminal 1, an output data of a RAM3 is inputted to an adder 4. When a signal from a selector 9 goes to logical 1, the data is increased by 1 and then stored again to the RAM3. Two signals having a different period are fed to input terminals 6, 7 of the selector 9, which is switched by the output of a comparator 8 to which the output of the RAM3 is inputted. That is, when the output of the RAM3 is smaller than a prescribed value, a signal with a short period is outputted and when larger, a signal with a long period is outputted. Thus, long-time measurement is attained with a counter of less number of bits and the accuracy at short time measurement is kept high.
申请公布号 JPS6152027(A) 申请公布日期 1986.03.14
申请号 JP19840173391 申请日期 1984.08.22
申请人 NEC CORP 发明人 MORIMURA HIROSHI
分类号 H03K21/02;H03K21/00;H03K25/00 主分类号 H03K21/02
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