发明名称 COMPLEMENTARY TYPE MOS SEMICONDUCTOR DEVICE
摘要 PURPOSE:To enable the effective prevention of parasitic effect, and to enable the disconnection of wirings to be prevented by reducing stepwise differences, by a method wherein the titled device is shielded by providing conductive layers made of poly Si on the field oxide films on the substrate and the well region. CONSTITUTION:Buried type field oxide films 51 are selectively formed in field regions 49 and 50, and the conductive layers 52 are formed thereon by depositing poly Si at he same time with gate electrodes 39 and 46; further, a CVD oxide film 53 if formed so as to cover the conductive layers 52. The poly Si is kept doped with the phosphorus giving N type and deposited over the whole surface, then etched into the gate electrodes 39 and 46 and the conductive layers 52. Since the conductive layers 52 made of poly Si are formed over the field regions 49 and 50 of the substrate 31 and the well region 32, the conductive layers 52 are always present under wirings located on the CVD oxide film 53. Thereby, electric fields produced by the potential of wirings are shielded by the conductive layers 52; therefore, the electric fields by wirings are not impressed on the surface of the field regions 49 and 50; accordingly, the formation of field inversion layers is prevented.
申请公布号 JPS6151960(A) 申请公布日期 1986.03.14
申请号 JP19840174482 申请日期 1984.08.22
申请人 SANYO ELECTRIC CO LTD;TOKYO SANYO ELECTRIC CO LTD 发明人 OYABU HIROYUKI;KUJIRAI TAKESHI
分类号 H01L27/08;H01L21/768;H01L23/522;H01L27/092 主分类号 H01L27/08
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