| 摘要 |
<p>A method of constituting a digital filter which does not form in the circuit a loop that excludes delay elements, which has a low coefficient of sensitivity and a low sensitivity for the internal operation word length. First, a node or closed circuit equation of an analog filter which is to be converted into a digital filter, is subjected to S-Z conversion to convert it into an equation which is mapped on a Z-plane. The digital filter to be found is constituted by using the equation mapped on the Z-plane as an equation which has a delay to give a node voltage or a closed circuit current. The digital filter can also be found by converting the inductance of the analog filter into an equivalent circuit which consists of a resistance and a capacitance having positive and negative values, and by using the node or closed circuit equation of this equivalent circuit.</p> |
