| 摘要 |
PURPOSE:To speed up a delay time by the operation close to ratioless operation by detecting/accelerating/amplifying an input signal and outputting it when the input signal is inputted to an input buffer and the delay circuit so as to suppress the brought-current to a minimum value even if the input signal has a voltage change. CONSTITUTION:The titled circuit consists of series circuits S1, S2 and inverter circuits I1, I2. When the level of a signal input terminal D1 is low, a connecting point D2 goes to a high voltage level, a connecting point D3 goes to a low voltage level, and a signal output terminal D4 goes to a high voltage level. When the D1 goes to a high voltage level from a time t1 to t6, the D2 starts charging from a high voltage level to a low voltage level from the t2. The series circuit S1 is ratioless, no through-current exists at all, and the signal waveform at the D2 is sharper. The D3 starts changing from a low voltage to a high voltage level from a point of time delayed slightly from the t2. Further, the D4 starts changing from a high voltage to a low voltage at a point of time slightly delayed from the t3 and goes completely to a low voltage level at a point of time delayed slightly from the t5. |
