| 摘要 |
PURPOSE:To form a master slice type semiconductor integrated circuit device to be highly integrated by a method wherein a semiconductor integrated circuit device is formed utilizing basic cells extended from element regions to the part below wiring layers. CONSTITUTION:An element region 14 is formed by conventional pattern and then elements (ROM cells) utilizing a diffused layer 18 and polysilicon layers 191, 192 are formed on the lower layer of wiring region 15 to provide aluminium wiring on the elements through the intermediary of an insulating layer. One end of the diffused layer 18 formed of continuous crosses is connected to a power supply 122 through the intermediary of a contact hole 20. Besides, the polysilicon layers 191, 192 respectively formed into comb shape are formed on the diffused layer 18 while a MOS transistor is to be formed on the intersection of diffused layer 18 with the polysilicon layers 191 or 192. |
