Semiconductor integrated circuit device.

摘要

In an MOS integrated circuit device, the level of the back-bias voltage (-Vbb) which is generated by a built-in back-bias generation circuit (Vbb-G) and is supplied to a semiconductor substrate is changed by undesirable leakage current flowing through the semiconductor substrate. The leakage current is not constant but becomes relatively small when a main circuit formed on the semiconductor substrate such as a dynamic RAM is not operative, and relatively great when such a circuit is operative. To reduce the change of the back-bias voltage resulting from the change of the leakage current, the back-bias voltage generation circuit (Vbb-G) has an output capacity of a plurality of levels. The output capacity is increased in response to an operation control signal of the main circuit. The level change of the back-bias voltage generation circuit (Vbb-G) can further be reduced by providing a level detection circuit (VLD) for detecting the level change and a feedback circuit for controlling the back-bias voltage generation circuit in accordance with the output of the level detection circuit (VLD)