| 摘要 |
PURPOSE:To contrive the enhancement of a breakdown voltage of MOSFET and to improve the dependence of a threshold voltage upon a channel length by preventing a damage of elements after breakdown of drains by effecting the ion implantation for arranging source and drain regions with separating it into two processes. CONSTITUTION:For using a gate electrode two times by self-alignment, the lateral-direction part of polycrystalline silicon 3 is oxidized by wet thermal oxidation and thermal oxidation films 2-1 and 2-2 on a substrate is removed by etching. Then the first impurity layers 7-1 and 7-2 are formed by the implantation or arsenic impurities. After a silicon nitride film 5 and oxide films 6-1 and 6-2 are removed by etching, arsenic impurities are implanted by the lower energy than that of the last time, thereby forming the second impurity layers 8-1 and 8-2. Consequently, it is made possible to provide a difference in a distribution of concentration and a depth of diffusion of impurities in source and drain regions respectively. |
