发明名称 Output stage for power amplifiers
摘要 The output stage for power amplifiers, in particular of the minimum drop, low tension type, is intended for use with apparatus which do not require a high output current, which output stage can operate at a lower minimum voltage supply than comparable known stages. The output stage comprises upper and lower sections interposed between a power supply line and a ground line, each section including transistors across which voltage drops (VCE sat, VBE) appear and forming current sources for each section, diodes, and at least one current mirror circuit of the multiplying type adapted to determine as a first approximation the current gain of each section. The minimum voltage drop between the power supply line and ground line, as computed for any electric line connecting the power supply line and ground line, never exceeds the value of VBE+2VCE sat.
申请公布号 US4575686(A) 申请公布日期 1986.03.11
申请号 US19840634002 申请日期 1984.07.24
申请人 SGS-ATES COMPONENTI ELETTRONICI S.P.A. 发明人 PALARA, SERGIO;TORAZZINA, ALDO
分类号 H03F1/02;H03F3/20;H03F3/30;H03F3/343;(IPC1-7):H03F3/26 主分类号 H03F1/02
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