发明名称 Digital switching system
摘要 A hierarchical message channel storage of a digital switching system which is connected to time division multiplex transmission lines includes at least a small-capacity high-speed memory and a large-capacity low-speed memory. A control section performs switching using the high-speed memory when a circuit switching call is received. However, when a packet switching call is received, the control section accesses the high-speed memory to temporarily store transmission data in the high-speed memory and performs switching for one of the output transmission lines or the control section accesses the high- and low-speed memories to temporarily store data in the low-speed memory through said high-speed memory so as to perform switching for one of said output transmission lines. In this case, the access cycles of the high-speed memory have circuit/packet switching call cycles and switching program cycles. A single storage is commonly used for the circuit switching call requiring writing data at a high speed, the packet switching call requiring storing a great amount of data, and the switching program.
申请公布号 US4575844(A) 申请公布日期 1986.03.11
申请号 US19840615438 申请日期 1984.05.30
申请人 NIPPON TELEGRAPH & TELEPHONE 发明人 KOSUGE, YASUHARU;MIYAHO, NORIHARU
分类号 H04Q11/04;H04L12/64;(IPC1-7):H04Q11/04 主分类号 H04Q11/04
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