发明名称 TIMING PHASE CONTROL SYSTEM
摘要 PURPOSE:To miniaturize the system by shifting a sample point of an inputted reception signal to extract the timing thereby decreasing the circuit scale. CONSTITUTION:Outputs of low-pass filters 19, 20 are given to an output terminal 28 of a timing phase circuit 26 via the 1st and 2nd band pass filters 26-1, 26-2 extracting each timing component from two orthogonal outputs subjected to synchronizing detection, square circuits 26-3, 26-4, an adder 26-5 obtaining each power of each output and adding each, a subtractor 26-7 subtracting an output of the circuit 26-5 and an added output before T(modulation period)/2sec and a sampling circuit 26-8 obtaining every other sampling value sequentially. Further, the timing is extracted by feeding back an output of the circuit 26-8 to an A/D converter 27 to control the converter 27 thereby moving the sampling point of the reception signal inputted to a terminal 13.
申请公布号 JPS6145658(A) 申请公布日期 1986.03.05
申请号 JP19840166541 申请日期 1984.08.10
申请人 NEC CORP 发明人 YOSHIDA MASAHIRO
分类号 H03K5/00;H04L7/033;H04L27/227;H04L27/38 主分类号 H03K5/00
代理机构 代理人
主权项
地址