发明名称 |
RANDOM NUMBER GENERATING CIRCUIT |
摘要 |
PURPOSE:To increase the overall degree of integration of a random number generating circuit by adding a multiple to the contents of a memory for random number memory by an adder each input of a shift pulse and feeding a feedback signal to a carrier input terminal of the adder based on the output of said random number memory. CONSTITUTION:A random number generating circuit contains a shift pulse output pare 20 which delivers a shift pulse SP and a random number generating part 22 which produces a prescribed random number every input of the pulse SP. The part 20 adds the frequency data stored in a frequency data memory 24 to the totalized value B stored in a totalization memory 26 through an adder 28. This added value is used as the new value B to replace the contents of the memory 26. The part 22 consists of a shift circuit 32 serving as a shift register and a feeding circuit 12 which supplies the serial signals to the circuit 32 according to the parallel output of the circuit 32. The circuit 32 contains a random number memory 34 and an adder 36. |
申请公布号 |
JPS6145331(A) |
申请公布日期 |
1986.03.05 |
申请号 |
JP19840167629 |
申请日期 |
1984.08.09 |
申请人 |
NAMUKO:KK |
发明人 |
NAKAMURA SHIGEKAZU;MURATA HIROYUKI |
分类号 |
H04L9/22;G06F7/58;G10H7/00;H04L9/20 |
主分类号 |
H04L9/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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