发明名称 TEST SYSTEM OF FREQUENCY SYNCHRONIZATION
摘要 <p>PURPOSE:To attain the test of a line by detecting whether or not a data number in a synchronizing buffer exists between an upper limit and a lower limit value. CONSTITUTION:In testing a line between nodes ND-A and ND-B, an output and an input of a terminal DTEb side of the node ND-B are connected, the test data is transmitted from a terminal DTEa connected to the node ND-A and the terminal device DTEa receives the test data. That is, a loopback line is formed for the test. The test is conducted by the test system like this and the data number in the data speed adjustment buffer built in a multiplex MXa of the node ND-A side is checked to check the operating state of a loopback line.</p>
申请公布号 JPS6145650(A) 申请公布日期 1986.03.05
申请号 JP19840166822 申请日期 1984.08.09
申请人 FUJITSU LTD 发明人 TAKEYAMA AKIRA;TAZAKI TAKASHI;MATSUDA MASAHIRO;MITA TERUYOSHI
分类号 H04L7/00 主分类号 H04L7/00
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