发明名称 WRITE INHIBIT CIRCUIT FOR EPRROM
摘要 <p>PURPOSE:To inhibit the rewriting to written-on circuit by connecting the sensor circuit with second bias circuit, connecting both of the circuits with the control circuit and prescriving the output from the sensor circuit to the writing condition to the non-volatile memory cell transistor. CONSTITUTION:The information for inhibiting the writing is provided by the writing to non-volatile memory cell transistor Q10. Bias circuit 1 is controlled so as to impress voltage Vcc to the gate of memory cell transistor Q10 and to connect the drain with sensor circuit 3. Sensor circuit 3 decides the writing or non-writing in memory cell transistor Q10 by the value of drain current of Q10. When memory cell transistor Q10 has been written, output from sensor circuit 3 is turned to ''H''. Notwithstanding ''L'' of Px, Py signal 8, output signal 9 from the inverter is on ''H'' so that the writing to transistor Q9 in the EPROM to be written is inhibited.</p>
申请公布号 JPS6157099(A) 申请公布日期 1986.03.22
申请号 JP19840179712 申请日期 1984.08.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HATAKEYAMA SHINICHI
分类号 G06F12/14;G06F12/16;G06F21/02;G11C16/02;G11C17/00 主分类号 G06F12/14
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