| 摘要 |
PURPOSE:To contrive the enhancement of integration efficiently by setting off the part of the length of a gate of p-channel transistor which is over an n-channel transistor by making a contact window smaller than the n-channel transistor. CONSTITUTION:The source and drain regions of a p-channel transistor TRTr7 is formed more deeply than the source and drain regions 25 of an n-channel TRTr5 which is formed by the same heat treatment. At this time, the arrangement of basic cell regions is done with referring to a size of the TRTr5 as a standard. Then the part of the length of a gate of the p-channel TRTr7 which is over the length of TRTr5 is set off by making a contact window smaller than the n-channel TRTr5. Thus the p-channel TRTr7 and n-channel TRTr5 are arranged with keeping the good balance and the highly integrated basic cell in which no deterioration of the characteristics occurs for both TRs can be obtained. Accordingly, it is possible to enhance the integration of the LSI in which a plurality of basic cells are integrated efficiently without extending a wiring channel pitch. |
