发明名称 MANUFACTURE OF COMPLEMENTARY MIS SEMICONDUCTOR DEVICE
摘要 PURPOSE:To provide CMIS device by utilizing the fact that SiO2 groups rapidly on surface as density of impurity layer is higher for foming ion applying mask and applying ion through gate insulation film disposed on a side to form sources and drains. CONSTITUTION:P-layer 3 is disposed on n-type Si substrate 1 and selectively removed to form gate insulative film and further form Si gate electrode 5. Next, unnecessitated part of gate insulative layer 5 of n-channel FET and n-type source 9 and drain 10 are formed and the electrode 5 and Si wiring layer 11 are electrically conducibilized. Then, it is oxidized under low temperature steam to form SiO2 3 on the layers 9, 10 the electrode 5 and wiring layer 11 and then by impurity density SiO2 is formed on only these parts thicknessly and is not grown on other part. Thus, by applying B ion, p<+>-layers 7, 8 are formed without effecting to other part. By this method, thickness of SiO2 film to be removed by etching is reduced and stairs of the side of the wiring layer 11 is further reduced and thus CMIS device being continuous on upper layers.
申请公布号 JPS5553459(A) 申请公布日期 1980.04.18
申请号 JP19780126250 申请日期 1978.10.16
申请人 HITACHI LTD 发明人 MEGURO RIYOU
分类号 H01L29/08;H01L21/265;H01L21/266;H01L21/8238;H01L27/092;H01L29/78 主分类号 H01L29/08
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