| 摘要 |
PURPOSE:To improve the processing efficiency by providing a DMA (direct memory access) controller to a primary processor and connecting both element processors at data transmission and reception sides to the primary processor. CONSTITUTION:Plural element processors 13,20...2n are connected to a primary processor 1. A register 17 for bus transfer request is provided to each of processors 13,20...2n. At the same time, a DMA controller 4 is provided to the processor 1 to perform the transfer of data among local memories 15 of processors 13, 20...2n. Then the element processors at both data transmission and reception sides are connected to the processor 1. |
