| 摘要 |
A control logic circuit (C) works with a RAM (MEM), pulse width modulators (MOD1,MOD2), and drive stages (D1,D2) which are connected to the windings (W1,W2) of the motor (M). The memory contains a number of tables each representing a voltage-time pattern. Each time, two tables are read which are valid for a given drive situation. The tables are divided into one section (I) for acceleration, one (II) for constant speed, and one (III) for retardation. On reading, the table numerical value occurs successively on the outputs leading to the pulse width modulators (MOD1,MOD2). In the modulators, the numerical value is converted to voltage pulses, the length of which is proportional to that value, whilst the pulse repetition frequency is constant. The pulses pass via a conduit (L1,L2) to the corresp. drive stage (D1,D2) which under their effect connects its respective winding (W1,W2) to the two poles of a voltage source. During the interval between two pulses the motor winding is disconnected from the voltage source. On another line (L3,L4) the respective drive stage receives a signal from a corresp. modulator, this signal determining the polarity of the voltage fed to the respective winding. |
