| 摘要 |
<p>PURPOSE:To use a terminal for parallel data output to output serial data by providing a control signal which indicates serial output of data, a gate circuit controlled on a basis of this signal, etc. CONSTITUTION:In the machine cycle preceding a certain machine cycle where a serial output instruction should by executed, data to be outputted is transferred from a RAM9 to an accumulator ACC11. In the next machine cycle, data in the ACC11 is transmitted by a control signal CN1 which indicates serial output of data in the ACC11. At this time, an output CK of an AND gate 20 goes to ''1'' in accordance with a timing signal, and latch circuits 16, 17, 18, and 19 take in inputs. Consequently, the least significant bit of data transmitted to a data bus DBUS0 is outputted from an output terminal 12 through the circuit 16, and a shift instruction which shifts down data in the ACC11 is executed in a next machine cycle MCn-1. Thus, the terminal for parallel data output is used to output serial data.</p> |
