| 摘要 |
PURPOSE:To improve the operating ratio of an input/output device or the like by discriminating a position where parity error occurs. CONSTITUTION:If parity error exists in read data when a line control part 110 or a processor 111 reads out data in a RAM113, a register 117 is triggered through a signal line 119 by a parity check circuit 116, and the memory address for the occurrence of parity error is latched. Simultaneously, a parity error occurrence signal is sent from the parity check circuit 116 to the processor 111 through the signal line 119. Thus, the processor 111 resognizes the occurrence of parity error. Further, the processor 111 opens a bus gate circuit 118 and takes in address data 120 stored in the register 117 to detect the address where parity error occurs. |
