| 摘要 |
A semiconductor integrated circuit comprises a differential pair of transistors, a pair of constant current source transistors, an emitter resistor connected between the emitters of the differential transistors, and a load resistor coupled to the collector of one of the differential transistors. Each of the differential transistors and constant current source transistors is a vertical PNP transistor. In the semiconductor integrated circuit, therefore, each vertical PNP transistor has its collector coupled with a parasitic diode having a relatively large junction capacitance. The parasitic diodes are reversely biased when the circuit is operative. In order to prevent the frequency characteristic from being deteriorated due to the junction capacitance of the parasitic diodes, a resistor circuit, which forms a differentiating circuit together with the emitter resistor and the parasitic diodes, is connected between the cathodes of these diodes and a power source, whereby the differentiating time constant of this differentiating circuit is so adjusted as to become substantially equal to the integrating time constant of an integrating circuit including the load resistor and the parasitic diode.
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