发明名称 FORMATION OF SUBMICRON FEATURES IN SEMICONDUCTOR DEVICES
摘要 <p>FORMATION OF SUBMICRON FEATURES IN SEMICONDUCTOR DEVICES This invention involves the defining of a submicron feature 93 in a structure, typically an insulated gate field effect transistor structure. This feature is defined by a sidewall oxide layer 71 formed by reactive oxygen ion etching of the structure being built at a time when an exposed layer 64 in the vicinity of the sidewall contains atoms of a material, for example, silicon or aluminium, which combine with the oxygen ions to form the sidewall oxide layer. The sidewall oxide layer may be used as a mask to form a feature 93 or it may itself constitute such a feature, for example a protective layer on the sidewalls of a polysilicon gate of a F.E.T.</p>
申请公布号 CA1201216(A) 申请公布日期 1986.02.25
申请号 CA19820416587 申请日期 1982.11.29
申请人 WESTERN ELECTRIC COMPANY, INCORPORATED 发明人 KINSBRON, ELIEZER;LYNCH, WILLIAM T.
分类号 H01L29/78;H01L21/033;H01L21/28;H01L21/302;H01L21/3065;H01L21/311;H01L21/316;H01L21/3213;H01L21/336;(IPC1-7):H01L21/31 主分类号 H01L29/78
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