发明名称 CARRIER DETECTING CIRCUIT
摘要 PURPOSE:To transmit efficiently a next data by providing a means ANDing a leading time and a trailing time of a detected carrier detection signal so as to reduce waste time of data reception. CONSTITUTION:A data signal subject to frequency modulation by a data transmitter 1 is demodulated into the original data signal by a frequency demodulator 8-2 of a data transmitter 2' via a transmission line 9 and received by a data reception section 4-2. On the other hand, a data signal subject to frequency modulation is shaped into a limiter waveform A by a level converter 16 and inputted to a monostable multivibrator 17 and a counter 19. A waveform B is obtained from an output of the vibrator 17 and a waveform C is obtained from an output of the counter 19 and a carrier detection signal D having a leading time Ts and a trailing time Tf is formed by inputting them to an AND gate 21. In giving this signal D to a reception section 4-2, the waste of data reception due to the delay in the trailing Tf is reduced and the data is transmitted efficiently.
申请公布号 JPS6135656(A) 申请公布日期 1986.02.20
申请号 JP19840156627 申请日期 1984.07.27
申请人 FUJITSU LTD 发明人 YOSHIDA OSAMU
分类号 H04L5/16;H04L1/20;H04L27/14;H04L27/156 主分类号 H04L5/16
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