| 摘要 |
PURPOSE:To prevent an operation sequence from being interrupted at an inspected circuit side by returning a pseudo hold confirmation signal to a target point or ints peripheral circuit part if a hold request is generated at the target point or its peripheral circuit part. CONSTITUTION:The output of an inverter G1 which receives a hold request signal HOLD1 from the inspecting device body during active intervention is supplied to one input terminal of an OR gate G2 and a hold request signal HOLD2 from the target point or its peripheral circuit part is supplied to the other input terminal. An FF circuit U receives the signal HOLD2 at its D input and latches it by the rising of a clock CLK. An AND gate G3, on the hand, receives the Q output of the FF circuit U at one input terminal and a hold confirmation signal HLDA2 from a microprocessor at the other and outputs a hold confirmation signal HLDA1. Consequently, even if the hold request signal is generated at the target point or its peripheral circuit part, a pseudo hold confirmation signal is sent back to eliminate the need to interrupt the operation on sequence at the inspected circuit side. |
