发明名称 Analog multiplier circuit.
摘要 <p>The analog multiplier circuit consists of one or more differential amplifiers (30, 40) coupled to generate first and second currents (5, 6) whose difference varies in response to a first electrical signal (1,2), and each having a summing node for the currents coupled to a signal current source (7, 8, 60) which controls the sums of currents in response to a second electrical signal (3, 4) to make the difference of currents vary in proportion to the product of the signals. Improved accuracy in the multiplication of varying electrical signals is achieved by DC separation between the differential amplifier (30, 40) and the signal current source (7, 8, 60). Bias current for the differential amplifier (30, 40) is provided by a direct current source (17, 18), and the signal current source (7, 8, 60) is AC coupled to the summing node to achieve multiplication of signals. Differential amplifier (30, 40) and signal current source (7, 8, 60) may be emitter coupled transistors (7, 8, 9, 10, 11, 12). AC coupling may be achieved by means of a resistor (15, 16) and a capacitor (13, 14) or by other means.</p>
申请公布号 EP0171653(A2) 申请公布日期 1986.02.19
申请号 EP19850109080 申请日期 1985.07.20
申请人 HEWLETT-PACKARD COMPANY 发明人 SPAULDING, WILLIAM M., SR.
分类号 H03F3/45;G06G7/163;H03D7/14;(IPC1-7):G06G7/163 主分类号 H03F3/45
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