发明名称 MEMORY INITIALIZING SYSTEM
摘要 <p>PURPOSE:To obtain a processing system for preventing data on a memory from being damaged, even if its processing is executed except the time when a power source is turned on, by setting a mode for inhibiting an error check at the time of readout of the memory, and utilizing this function at the time of write. CONSTITUTION:An FF6 is set/reset by a command from a processor 1, and an output of an ECC error checking circuit 3 is inhibited or made effective. When the processing is started, the processor 1 issues an ECC check inhibiting command, reads out data from the head address of a memory and writes it in the same address. Also, write and readout are repeated by increasing an address, and executed until the final address of the memory. In the end, an ECC check effective command is issued.</p>
申请公布号 JPS6134646(A) 申请公布日期 1986.02.18
申请号 JP19840155363 申请日期 1984.07.27
申请人 HITACHI LTD 发明人 YOSHIMURA MASAAKI
分类号 G06F12/16;G06F1/00;G06F1/24;G06F11/10 主分类号 G06F12/16
代理机构 代理人
主权项
地址