| 摘要 |
PURPOSE:To speed up an operating speed by synchronizing logical instruction operation with an MPU system clock, and at the execution of an application instruction, jumping the operation to the leading address of an interprinter on the basis of the operation code of the instruction. CONSTITUTION:A program counter (PC)1 controls the address of a user program memory (UM)2 and fetches the operation code when the A0 bit of the PC1 is ''0'', or its operand in case of ''1''. An arithmetic circuit 3 is constituted of a timing control circuit, an operation code latch circuit, etc. and an MPU address selecting circuit 4 decodes an MPU address and an MPU control signal to execute the chip selection control or the like in a system program memory 5. Consequently, logical instruction processing is executed synchronously with the clock of the MPU7 and application instruction processing is jumped to the leading address of the interprinter through an interprinter jumping code forming circuit. |
