| 摘要 |
This processor essentially comprises a parallel calculating circuit 2 whose input X, Y and output P are each linked to a bus segment 4, 5, 6 forming part of a bus 3 forming a closed loop divided into segments by bi-directional gates 7, 8, 9 and a specialised logic processing circuit 2' whose inputs and output are each linked to one of these segments. Application: signal processing. <IMAGE>
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