发明名称 INTEGRATED LOGIC CIRCUIT DEVICE
摘要 PURPOSE:To facilitate connection between functional blocks by a method wherein an array of basic cells is made in plural rows and arrayed two-dimensionally, then wiring spaces are prepared between each plural rows. CONSTITUTION:Basic cells 1 are formed the basic cells 6 in plural rows, rather than in a single row, and these basic cells 6 in plural rows are repeatedly arranged with wiring spaces 3. If a big scale block is composed by this constitution, the basic cells are not extended too much in a direction of longitude and also wiring space 3 is not occupied for connecting the basic cells 1 each other to realize the big scale block, then allocation of the basic cells group is enabled. That is, the wiring between the basic cells to realize the big scale block can be done within the allocated basic cells group and make possible to minimize the affection to the wiring spaces between the functional block.
申请公布号 JPS6130050(A) 申请公布日期 1986.02.12
申请号 JP19840150605 申请日期 1984.07.20
申请人 NEC CORP 发明人 KIMURA HIROMICHI
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/118 主分类号 H01L21/822
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