| 摘要 |
PURPOSE:To reduce a floating capacity between a parasitic inductance between a chip and a GND, and electrodes by providing a hold in a beryllia resin, and bonding a semiconductor chip on a metal projection to be inserted. CONSTITUTION:The opposed side and bottom of a beryllia resin 11 are coated with a metal plate 12 to become a source electrode, and a gate electrode 13 and a drain electrode 14 are secured. A hole 15 is opened at the center, and a MOSFET chip 16 is soldered onto the projection 12a inserted into the hole. The electrode 12 is soldered by a solder 23 to an earth pattern 22 on a printed board 21, the chip 16 and the pattern 22 are connected at the shortest distance, and a distance between the source electrode and other electrodes becomes large. |
