发明名称 MOUNTING METHOD OF SEMICONDUCTOR ELEMENT
摘要 PURPOSE:To lessen the height of wires by a method wherein, after an insulating layer is formed on the edge parts of a semiconductor element, a wire-bonding is performed. CONSTITUTION:A UV curing resin 2 is coated on an integrated circuit 1 and an exposure is selectively performed using a mask 4. After that, the resin, which becomes unnecessary, is removed and the semiconductor element is made in a structure, wherein the exposed surface of the integrated circuit 1 is covered with the insulating material 2. By this way wires 3 are brought into contact with the integrated circuit 1 through the insulating material 2 without coming into contact directly with the integrated circuit 1 and even though the height of the wires 3 is made sufficiently lower at the time of bonding-wire, the wires and the edges of the semiconductor element are never electrically short-circuited.
申请公布号 JPS6127643(A) 申请公布日期 1986.02.07
申请号 JP19840147613 申请日期 1984.07.18
申请人 TOSHIBA CORP 发明人 SAITO TAMIO
分类号 H01L21/60 主分类号 H01L21/60
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