发明名称 PHOTOMASK FOR REDUCTION PROJECTING EXPOSURE
摘要 <p>PURPOSE:To make the replacement of a photomask unnecessary and to simplify an operation by reducing and projecting a main chip exposing pattern or a semiconductor integrated circuit device and at least one kind or more of other chip patterns, onto the same photomask material. CONSTITUTION:A main chip exposing pattern 212 of a semiconductor integrated circuit device and a pattern 213 containing a group of various decices, which is different from the main chip are constituted on a photomask 211 for a reduction projecting exposure device. When a wafer is exposed by using the photomask 211, as for an exposed part 222 of the main chip pattern on the wafer 221, an expanse of a blind of the reduction exposure device is set so that only the main chip pattern side (212) is exposed. As for a part 223 for exposing various device patterns, the expanse of the blind is set so that only the side of various device patterns is exposed by considering a positional offset of the wafer stage side caused by a difference of a pattern position on the photomask. In such a way, the photomask is positioned by only once, and the operation can be simplified.</p>
申请公布号 JPS6127543(A) 申请公布日期 1986.02.07
申请号 JP19840148102 申请日期 1984.07.17
申请人 NEC CORP 发明人 MIZUSHIMA KAZUYUKI
分类号 G03F1/00;G03F1/38;H01L21/027 主分类号 G03F1/00
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