发明名称 MULTI-SELECTION FAULT DETECTING METHOD FOR MEMORY DEVICE
摘要 PURPOSE:To detect multi-selection fault by ANDing of the OR of level of 2<n-1> pieces of the lines to be selected by address patterns of the first subset of 2<n> pieces of lines to be selected and the OR of level of 2<n-1> pieces of lines to be selected of the second subset. CONSTITUTION:W0 and W3 of lines 2 to be selected are simultaneously selected against input of address. Likewise, when W2 of lines 2 to be selected of address pattern, W1 is selected, too, when W4 of lines 2 to be selected of address pattern is selected, W7, too, when W5 of the selected line 2 of address pattern is selected, W6, too. Therefore, in such a condition, OR P1 and OR P2 become ''1'' together, and AND Q becomes ''1''. In case that the lines 2 to be selected are selected normally, AND Q becomes ''0'' against input of every address pattern, and in case that multiselection fault exists, AND Q becomes ''1'', which makes it possible to discriminate whether or not multi-selection fault exists, by value of AND Q.
申请公布号 JPS6124099(A) 申请公布日期 1986.02.01
申请号 JP19840144001 申请日期 1984.07.11
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 MATSUO HIROSHI;SHIYUDO KEIZO;UEOKA YASUSHIGE
分类号 G06F12/16;G11C8/00;G11C11/413;G11C29/00;G11C29/04;G11C29/12 主分类号 G06F12/16
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