发明名称 ARITHMETIC UNIT
摘要 PURPOSE:To decrease the total processing cycles and to simplify the pipeline control by reading out a conversion constant dependent on the arithmetic data at a high speed with a fixed constant and with no branch of a microprogram. CONSTITUTION:The contents of the head address A1 of a conversion instruction is first read out together with a reading indication A1 of an operand 1 to a control memory reading register CSR5. The arithmetic data D on the conversion subject given from an SVR memory 10 is set to an input register 1 for the operand 1. While an output OOH is set at a K field of the CSR5 and a replacement mode is set. Then the contents of an execution address A2 are read out together with a holding indication of the operand 1, an address designation to a constant memory 8 and a replacement mode indication A2. Thus the register 1 is held and the least significant bit of the output OOH of the K field of the CSR5 is replaced with the code bit output S of the data D. Then a conversion constant lambda is read out to a constant memory output register 3 according to the code S.
申请公布号 JPS6123232(A) 申请公布日期 1986.01.31
申请号 JP19840143905 申请日期 1984.07.11
申请人 NIPPON DENKI KK 发明人 YAMADA IKUO
分类号 G06F7/00 主分类号 G06F7/00
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