发明名称 GATE ARRAY LSI DEVICE
摘要 PURPOSE:To arbitrarily set the capacity of the memory circuits and the circuit configuration by a method wherein the input leads of the memory block are properly connected to the wirings having the prescribed potential through contact holes and a part of input terminals of the memory circuits are clipped to the prescribed potential. CONSTITUTION:Wirings 7-12 of the prescribed potential, which pass the upper parts or the lower parts of the input leads to be constituted of conductive layers different from conductive layers 13 and 14 constituting the input leads of the memory block having memory circuits 1 and 2, are provided on the peripheral part of the memory block and the input leads 13 and 14 are properly connected to the wirings 7-12 of the prescribed potential through contact holes 13a and 14a. By this constitution, the input terminals of the address buffers of the memory circuts can be easily clipped to the supply voltage and so forth in the gate array LSI device with its built-in memory circuits and various functions, such as a free setting of the memory capacity, control system and so forth of the memory circuits or a read-write operation in plural ports, can be realized.
申请公布号 JPS6122648(A) 申请公布日期 1986.01.31
申请号 JP19840135210 申请日期 1984.07.02
申请人 FUJITSU KK 发明人 TANABE TOMOAKI;FUJII SHIGERU;TAKAYAMA YOSHIHISA
分类号 H01L21/822;G11C5/02;G11C11/401;H01L21/3205;H01L21/82;H01L23/52;H01L27/04;H01L27/118 主分类号 H01L21/822
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