| 摘要 |
PURPOSE:To eliminate a dedicated bus and to reduce a semiconductor chip area by utilizing an inner bus of CPU and connecting an input/output port thereto. CONSTITUTION:An input/output port 23 is connected to an inner bus 18. Also the inner bus 18 is connected to an input side of a multiplexer 31 through a bus 31 so that data from the inner bus 18 and data from a memory 11 area switched by a multiplexer 13 and set at an instruction register 15. Furthermore, a bus 16 is connected to the bus 18 through a bus 32 so that the contents of the instruction register 15 area supplied to the inner bus 18. In case of test, the input/output port 23 is set to input state by the signal sent from a terminal 27, and the test instruction is issued from outside to the inner bus 18 through the input/output 23 by giving timings M5 and M6 other than the instruction execution cycles issued from timing generator from a terminal 37. |
