发明名称 |
Method of fabricating memory cell for semiconductor integrated circuit. |
摘要 |
<p>According to a method of fabricating a memory cell for a semiconductor integrated circuit, a lower electrode having a predetermined shape is formed on a semiconductor layer. A first insulating interlayer is formed on an entire surface of the semiconductor layer such that only a top surface of the lower electrode is exposed. A dielectric having a high dielectric constant is formed on the lower electrode and on the semiconductor layer. An upper electrode is formed on the dielectric having a high dielectric constant. The upper electrode constitutes a capacitor with the lower electrode through the dielectric. <IMAGE></p> |
申请公布号 |
EP0488283(A2) |
申请公布日期 |
1992.06.03 |
申请号 |
EP19910120395 |
申请日期 |
1991.11.28 |
申请人 |
NEC CORPORATION |
发明人 |
TOSHIYUKI, SAKUMA;YOICHI, MIYASAKA |
分类号 |
H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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