发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To uniformize a structure by forming a leading-out P<+> type layer on the lower face of an N channel layer of MESFET at a position opposite to a first gate formed on the upper face of the channel layer and by applying a variable bias voltage to the second gate as a control gate. CONSTITUTION:A first conductive N channel layer 12 consisting of a semiconductor active layer is formed on one main surface of a substrate 11 by epitaxial growth or by ion implantation and annealing. N<+> type layers 13 and 14 with a high density are formed by ion implantation on respective sides of the channel layer 12. After that, source and drain electrodes 16 and 17 are formed such that they have ohmic contact with the layers 13 and 14. A first gate 15 is formed on the upper side of the N type channel layer, while a P<+> type layer 18 buried on the lower side of the N type channel layer 15, the opposite side to the first gate 15 is led out to the surface of the GaAs substrate 11 and connected with a second gate 19. By applying a variable bias voltage to the second gate, the first gate can be controlled in its apparent pinchoff voltage.
申请公布号 JPS6118180(A) 申请公布日期 1986.01.27
申请号 JP19840137187 申请日期 1984.07.04
申请人 HITACHI SEISAKUSHO KK 发明人 FURUKAWA KATSUHIRO;HATSUTA YASUSHI
分类号 H01L21/338;H01L29/808;H01L29/812 主分类号 H01L21/338
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