| 摘要 |
PURPOSE:To decrease an area per one cell shared in a chip, by forming a block corresponding to >=2 storae means into two adjacent areas together. CONSTITUTION:One cell CL11 of two CMOS memory cells CL11 and CL12 forming a minimum unit is formed with a PMOS area 21, an NMOS area 22 and a PN boundary area 23 between both the areas. The other cell CL12 is formed with a PMOS area 31 adjacent to the area 21 and an NMOS area adjacent to the area 22, and a large area PMOS area 41 and a large area NMOS area 42 are formed with the areas 21 and 31 and the areas 22 and 32. Thus, the area per cell shared in a chip can be decreased in comparison with the provision of a PN boundary area at each memory cell. |
