发明名称 EDGE DETECTING CIRCUIT
摘要 PURPOSE:To obtain an edge detecting circuit with loss cost and high flexibility by combining freely the modules containing the product/sum arithmetic circuits, maximum value detecting circuits and identification code generating circuits and also setting an optional window constant. CONSTITUTION:A module consists of a product/sum arithmetic circuit 3, a comparator 41, selection circuits 42 and 5 and FF6-8. Then eight modules A...H are connected in cascade. A window constant setting control signal 6 is used to set previously a window constant and identification codes 1-8 to each circuit 3. The estimated minimum value 128 of the picture element is set to the module A of the first stage as another input (3) supplied from outside together with an identification code (1) applied to the circuit 3 of the first stage as an identification code (5) supplied from outside. The maximum value of the density slope of each direction and the identification code of the circuit 3 are delivered for each module from the module H of the 8th stage through the pipeline processing.
申请公布号 JPS6115286(A) 申请公布日期 1986.01.23
申请号 JP19840135435 申请日期 1984.06.29
申请人 FUJITSU KK 发明人 GOTOU TOSHIYUKI;IWASE HIROMICHI
分类号 G06T7/60;G06K9/36 主分类号 G06T7/60
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