发明名称 START BIT DETECTION CIRCUIT OF SERIAL DATA RECEPTION SYSTEM
摘要 <p>PURPOSE:To detect accurately a start bit even when a noise pulse is mixed by detecting either a short or a long noise pulse before the start bit. CONSTITUTION:When the change of a data input from ''1'' to ''0'' after the reception of the stop bit of a serial data input is detected, it is brought once into the start bit detecting state. Then whether or not a short noise pulse is detected depending whether a data input restores to logical ''1'' or not during e.g., 2-clock cycle from the sampling clock at detection, and whether or not a long noise pulse is detected depending whether the majority of the sampling data is logical ''1'' or not by plural clocks after a prescribed time from the sampling clock detecting the change of data input from ''1'' to ''0''. When the noise pulse is detected, the state is restored again to the start bit detection standby state.</p>
申请公布号 JPS6115437(A) 申请公布日期 1986.01.23
申请号 JP19840136302 申请日期 1984.06.30
申请人 TOSHIBA KK;TOUSHIBA MAIKON ENGINEERING KK 发明人 IZUME MAKOTO;ARAKAWA NORIMASA;YOSHIKAWA JIYUNJI
分类号 H04L25/38;H04L7/04 主分类号 H04L25/38
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