发明名称 SS-TDMA REFERENCE STATION SYNCHRONIZING CONTROL CIRCUIT
摘要 PURPOSE:To improve detection accuracy by constituting the titled circuit that a difference in an expected value of a metric bit number when a metric region missing point differs by 1 bit is increased in a satellite reference time detector using the metric bit. CONSTITUTION:In the SS/TDMA equipment using the metric bit 4 and detecting the switching timing of a satellite station, in order to detect accurately the metric bit region missing point, the following countermeasures are taken; that is, in discriminating each metric bit whether it is received correctly or not, the erroneous state of each bit in it is reference with respect to the bit group comprising plural bits succeeding to each metric bit and when the bit number received correctly exceeds a prescribed threshold value, then it is discriminated that the bit is received correctly. Thus, since the difference of the expected value of the metric bit when the bit is shifted by one bit from the normal synchronizing state is increased larger, the metric region missing point is detected with high accuracy.
申请公布号 JPS6115428(A) 申请公布日期 1986.01.23
申请号 JP19840135158 申请日期 1984.07.02
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 NISHI YASUKI
分类号 H04J3/06;H04B7/15;H04B7/204;H04B7/212 主分类号 H04J3/06
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