发明名称 SEMICONDUCTOR LOGIC IC DEVICE
摘要 PURPOSE:To accomplish collective wiring with an automatic wiring tool by channel router by a method wherein the region of a memory circuit integrated with cell arrays is used as the second and third layer metallic wiring regions. CONSTITUTION:Part of the cell arrays are shorter than the other, and the shorter part is provided with the memory circuit 4 in the remaining space. Besides, an input and output circuit 3 is formed in the periphery of the chip. The connection between elements in the arrays 1 is carried out with the first layer metallic wiring, and the connection between elements in the circuit 4 is carried out likewise with the first layer metallic wiring. The connection between arrays and between arrays 1 and the circuit 4 is carried out with the second layer metallic wiring and the third layer metallic wiring.
申请公布号 JPS6115346(A) 申请公布日期 1986.01.23
申请号 JP19840135929 申请日期 1984.06.30
申请人 TOSHIBA KK 发明人 HIWATARI TAMOTSU
分类号 H01L21/82;H01L23/528;H01L27/118 主分类号 H01L21/82
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