发明名称 |
ON CHIP SELF-CHECKING ARRANGEMENT FOR VLSI CIRCUIT AND BUILT-IN (ON-CHIP) SELF-CHECKING DEVICE FOR VLSI MEMORY CIRCUIT |
摘要 |
<p>PURPOSE: To arrange a data pattern generator on the same chip as a super LSI circuit in order to generate specified deterministic inspection data applied to the data input of the super LSI circuit. CONSTITUTION: A deterministic data pattern generator 80 is provided on a super LSI chip, and detects a chip module and acts in such a way as to impart a pass/fail result along with data for identifying a failure generated place. This position data is collected to be used next time and made available. A built-in inspection circuitry can prepare a program and is provided with a looping function for the improvement of burn-in inspection or the like.</p> |
申请公布号 |
JPH06342040(A) |
申请公布日期 |
1994.12.13 |
申请号 |
JP19910190809 |
申请日期 |
1991.07.05 |
申请人 |
INTERNATL BUSINESS MACH CORP <IBM> |
发明人 |
JIEFURII HARISU DOREIBERUBISU;ERITSUKU REI HEDOBAAGU;JIYON JIYOOJI PETOROBUITSUKU JIYUNIA |
分类号 |
G01R31/28;G06F11/22;G06F11/27;G06F15/78;G11C29/10;G11C29/12;G11C29/16;G11C29/38;G11C29/44;H01L27/10 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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