发明名称 PHASE LOCKED OSCILLATOR
摘要 PURPOSE:To keep a stable phase lock state even for a large change in the operating condition by providing a control circuit producing a signal corresponding only to a DC or a low frequency component of a signal filtered by a loop filter and applying an output of the control circuit as a control voltage signal to a limit circuit. CONSTITUTION:When a signal transmitted from the loop filter 4 is inputted to a passing filter 8, a signal extracting a low frequency component and a DC component only from the signal from the filter 4 is formed and the resulting signal is transmitted to a control circuit 7. When the control circuit 7 inputs the signal, the circuit 7 produces a signal of superimposition between a signal reducing the signal voltage into 1/M and a voltage Vr dividing a DC voltage Vcc applied to a terminal 15 by resistors and inputs the said resulting signal to the limit circuit 12. When the limit circuit 12 receives this signal and the signal from the loop filter 4, the circuit 12 superimposes the signal from the control circuit 7 onto a signal reducing a signal voltage from the loop filter 4 into 1/N to form a phase control voltage signal. The phase control voltage signal is transmitted to a VCO1.
申请公布号 JPS6113818(A) 申请公布日期 1986.01.22
申请号 JP19840133313 申请日期 1984.06.29
申请人 TOSHIBA KK 发明人 INOMATA TAKUMI;INOUE SHINICHI
分类号 H03L7/10;(IPC1-7):H03L7/10 主分类号 H03L7/10
代理机构 代理人
主权项
地址