发明名称 SYSTEM FOR SUPERVISING CIRCUIT OPERATION
摘要 <p>PURPOSE:To supervise mutually the operating state of opposite circuits by utilizing a function provided substantially with plural circuits operated independently in a reception frame synchronizing circuit being a circuit to be supervised. CONSTITUTION:A content 9 outputted from a counter circuit 9 is written in a buffer circuit 10 in a timing 4' delaying to some degree a pulse signal 4 outputted from a counter circuit 2. Further, a content 11 outputted from a buffer circuit 10 is written in a buffer circuit 12 in the same timing. Then the operating state of the reception frame synchronizing circuit, that is, the operating state of the counter circuit 1 is spervised by comparing the output content 11 and the output content 13 at a comparator circuit 14 in a timing retarding to some degree the timing 4'. That is, if the operation of the counter circuit 1 being the circuit to be supervised is stopped due to any fault, the operation of a counter circuit 6 counting the output number of times of an output pulse signal 3 is stopped also, a 2-input coincidence signal 15 is outputted from the comparator circuit 14 to detect generation of a fault of the reception frame synchronizing circuit.</p>
申请公布号 JPS6113826(A) 申请公布日期 1986.01.22
申请号 JP19840134385 申请日期 1984.06.29
申请人 NIPPON DENKI KK 发明人 KIMURA HIROAKI
分类号 H04B7/15;H04B7/212;H04J3/14;H04L7/00 主分类号 H04B7/15
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