| 摘要 |
PURPOSE:To largely reduce the substrate current of a LDD structure element to suppress a gate current and to improve the reliability of the element by implanting an impurity so that the maximum value of an electric field is equally divided by N<->P<-> and N<+>P<+> regions. CONSTITUTION:A gate oxide film 2 and a polysilicon gate electrode 4 are formed on a silicon substrate 1 which contains boron as an impurity. Phosphorus impurity 5 is implanted under ion implanting conditions to form an N<-> type region 8 so that the maximum electric field value is equally divided in N<-> and N<+> regions under the operating voltage. An SiO2 film 11 is formed on a gate side wall, and arsenic impurity 6 is implanted to form an N<+> type region 9. The film 7 for passivation is accumulated, source, drain and gate are opened, and aluminum wirings 10 are formed. |
