| 摘要 |
PURPOSE:To obtain a low noise and high speed hetero junction bipolar transistor reduced in its parasitic resistance by interposing a semiconductor buffer layer between a semiconductor emitter layer and an emitter electrode metal, thereby shortening a distance between a base region and a base electrode. CONSTITUTION:An N-type InP collector layer 2 and a P-type InGaAsP base layer 3 are formed on an N-type InP substrate 1, and a reverse mesa stripe- shaped emitter layer 4 made of an N-type InP layer and an N-type InGaAsP buffer layer 5 are provided on part of a base layer 3. The second metal 7 made of AuGe of the emitter electrode is patterned as a mask, and the layer 5 is selectively etched. With the layer 5 as a mask to etch only the layer 4. A side etching occurs at the layer 5, but no side etching occurs at the layer 4. When the first metal 6 made of AuZn is deposited on the entire surface, the overhang of the second layer 7 makes a shade. Thus, the emitter and the base are separated in a self-aligning manner. |
